Stacked Via Contributes to Cost Savings for Businesses
Stacked Via Contributes to Cost Savings
Stacked via contributes to cost savings for businesses, because they offer the opportunity for a PCB manufacturer to make layer-to-layer connections without having to drill holes that directly line up. This means they don’t require copper filling around the stacked vias, which saves time and material costs. It also enables designers to use smaller pads and shorter paths for signal transmission that would be impractical with through-hole vias.
The use of stacked vias in a PCB design allows signals to be routed through different layers, which makes high-speed data transmission possible. Having multiple layers of connections allows the PCB to be thinner, which may be useful in designing for size constraints in enclosures and panel mount devices. Additionally, using stacked vias can allow a designer to meet minimum trace width requirements for a specific signal or power line without impacting the overall board thickness.
In order to implement stacked via, a special type of hole is used on each of the inner layers that are being connected. This type of hole is called a ‘via stack’ and can be either blind or buried. A buried via connects circuits between different inner layers and is only visible from one side of the PCB, while a blind via is drilled through all of the outer layers and is only visible from one of them.
Stacked Via Contributes to Cost Savings for Businesses
Unlike a standard via, which is typically a circular opening, a stacked via has a conical frustum shape and slopes inward as it makes a connection between layers. This reduces parasitic capacitance and improves performance, especially at high frequencies.
While there are several advantages to using stacked vias in PCB designs, it is important to be aware of the potential issues that can arise. For example, a stacked via can have a negative impact on the signal quality if there are too many layers. This is because the signal is traveling through a large area of copper with a significant amount of current, which can cause unwanted interference and noise.
Another issue that can occur is if the distance between adjacent stacked vias is too close to meet minimum separation requirements. This can affect the electrical conductivity of the stacked via and result in a loss of signal integrity. Staggering the positions of stacked vias can help alleviate this problem.
Staggered microvias are a common feature of HDI PCBs. They are made by offsetting the positions of via holes on each of the inner layers to avoid them from directly contacting one another. This angular alignment prevents the stacked vias from physically touching and reduces the need for filling copper around them, which streamlines fabrication.
Stacked vias are an excellent solution for high-density designs, as they enable the use of smaller pads and shorter paths for signal transmission. However, a faulty layout can lead to failure of the entire PCB. It is therefore critical that the correct design techniques are implemented in order to ensure a successful outcome.